raptop changed the topic of #kspacademia to: https://gist.github.com/pdn4kd/164b9b85435d87afbec0c3a7e69d3e6d | Dogs are cats. Spiders are cat interferometers. | Космизм сегодня! | Document well, for tomorrow you may get mauled by a ネコバス. | <UmbralRaptor> egg|nomz|egg: generally if your eyes are dewing over, that's not the weather. | <ferram4> I shall beat my problems to death with an engineer. | We can haz pdf
<kmath>
<rareflwr41> If you love your photons, set them free. ⏎ ⏎ Cumulative citations for all @sdssurveys Data Release papers as of this… https://t.co/5ca38Ky2Fh
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<egg|cell|egg>
What's with 7
<UmbralRaptor>
IIRC, it's the definitive one for photometry, and later ones only add speggtroscopic data
<egg|cell|egg>
喵
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* UmbralRaptor
pets egg|cell|egg
<egg|zzz|egg>
mofh: oh, the subcycle is just the convergent before the cycle?
<egg|zzz|egg>
i was thinking that this whole thing reeked of continued fractions
<egg|zzz|egg>
s/reek/smack/
<galois>
egg|zzz|egg meant to say: i was thinking that this whole thing smacked of continued fractions
<egg|zzz|egg>
s/think/holler/
<galois>
egg|zzz|egg meant to say: i was hollering that this whole thing smacked of continued fractions
<galois>
[WIKIPEDIA] Pfaffian | "In mathematics, the determinant of a skew-symmetric matrix can always be written as the square of a polynomial in the matrix entries, a polynomial with integer coefficients that only depend on the size of the matrix. The value of this polynomial, when applied to the coefficients of a skew-symmetric matrix..."
<egg|zzz|egg>
cc mofh
<egg|zzz|egg>
whitequark: will there be a boneless floating point instruction set
<whitequark>
nooooo
<whitequark>
first, i don't do numerics
<whitequark>
only drugs
<whitequark>
less hazardous to health
<whitequark>
second, if you want something huge like an FPU then just use a risc-v core
<whitequark>
i guess you technically could use half floats with boneless since they're 16 bit but i dunnnoooooo what that would even be useful for
<egg|zzz|egg>
oh gods no not touching that crap with a ten-foot mofh
<whitequark>
what crap, half floats?
<egg|zzz|egg>
yeah
<whitequark>
i've heard machine learning people moved to quarter floats by this point
<whitequark>
it "speeds up inference" or some shit like that
<egg|zzz|egg>
if you have no idea what you're doing, why do it precisely,
<whitequark>
that was what i am thinking but not saying out loud
* UmbralRaptor
aaaaaaaaaAAAAAAAAAAA
* egg|zzz|egg
scritches whitequark
<mofh>
the only use I can think of for hardware half floats (other than roflML) is fast SIMD audio decoding, since that's enough precision for that purpose
<egg|zzz|egg>
whitequark: mofh does touch 32-bit floats, I only deal in 64 and above (sadly above doesn't really exist in hard so I end up with double-double)
<mofh>
in practise this doesn't matter unless you're trying to implement, like, HE-AAC or Opus on a 33MHz core that somehow also does SIMD hardfloat
<mofh>
otherwise the only half instructions that make sense to do are half-to-float with rounding and float-to-half with rounding, since it's pretty much just an interchange format.
<whitequark>
mofh: I mean if I added SIMD hardfloat to boneless that's the frequency it would run at
<whitequark>
on an ice40
<mofh>
what's preventing an ice40 from being clocked higher, anyhow?
<whitequark>
mofh: ice40 'ultraplus' is the FPGA with absolute slowest fabric currently available on market (and slower than many historical ones too)
<whitequark>
i am in awe of their marketing department naming choices
<mofh>
can they not be externally clocked via some oscillator, tho?
<whitequark>
what the *meant* is that it is *ultra low power*, but they failed to communicate this in any way whatsoever. you have to read the datasheets really carefully. they don't even have a comparison table
<whitequark>
oh
<whitequark>
no, i mean, you can clock it at 1 GHz if you want.
<whitequark>
you can clock it as fast as you want as long as you don't care about correctness of your results
<egg|zzz|egg>
boneless on radhard hardware when,
<mofh>
oh, so basically at high enough speeds the interconnects in the fabric start failing in interesting ways?
<whitequark>
it's not "failing" exactly
<egg|zzz|egg>
DO-254 boneless,
<mofh>
egg|zzz|egg: 32-bit floats are fun, since often the mantissa range is smol enough that the algorithms you can get away with there are much simpler than the ones you need in double and beyond.
<whitequark>
mofh: so with synchronous logic, you're basically only interested in what happens after a posedge
<whitequark>
and on an FPGA (most modern architectures) the way the combinatorial elements work is that they are not glitchless
<whitequark>
so a posedge happens and for x nanoseconds the result of all combinatorial functions it computes is garbage
<whitequark>
the critical path determines how fast you can go
<mofh>
Oh. AHH.
<egg|zzz|egg>
mofh: 32-bit floats are easymode because you can actually test all inputs in single-argument functions too
<whitequark>
of course, there's no way to determine that you computed garbage
<mofh>
egg|zzz|egg: I mean yes, I do this often.
<whitequark>
like. ice40 is a sea of two things: flip-flops and 1-bit 16-element ROMs
* X
queries UmbralRaptor about how many nanoseconds he is.
<whitequark>
floating in interconnect
<egg|zzz|egg>
mofh: this is not an approach that works with double-precision elliptic integrals sadly
<mofh>
egg|zzz|egg: or even single precision, two inputs makes it nasty.
<whitequark>
in practice the timing analysis is conservative because you're interested in worst case, at like 85°C
<whitequark>
and since it works slower at higher temperature you can overclock it by maybe 10-20 MHz at room temp compared to what the toolchain says
<whitequark>
but... you still have to leave a healthy margin, because if it computes bullshit, you will not know
<mofh>
Yeah, I understand now.
<whitequark>
in practice bad clocks (too fast, glitchy, etc) can range from "no changes" to "half of your register fails to update" to "algebraically impossible results got the design into an impossible state and literally nothing about any part of it makes any sense now"
<whitequark>
anyway, risc-v on ultraplus... you're lucky if you can clear 25 MHz
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<egg|cell|egg>
!wpn whitequark
* galois
gives whitequark a stannic toxic compiler
<whitequark>
oh no
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<SnoopJeDi>
!wpn -add:adj LLVM
<galois>
Added adj 'LLVM'
<SnoopJeDi>
!wpn -add:adj invariant
<galois>
Added adj 'invariant'
<SnoopJeDi>
!wpn -add:wpn loop
<galois>
Added wpn 'loop'
<UmbralRaptor>
!wpn -add:adj GCC
<galois>
Added adj 'GCC'
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<UmbralRaptop>
!8 Does ⑨ allow one to decrease global entropy?
<galois>
UmbralRaptop: no
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<UmbralRaptor>
!choose get clawed by an eigenket | try to understand solving things with Green's functions
<galois>
UmbralRaptor: Your options: get clawed by an eigenket , try to understand solving things with Green's functions . My choice: try to understand solving things with Green's functions
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* UmbralRaptor
ignores the bot
<UmbralRaptor>
Also, Sakurai says "the proof is trivial" a lot
<kmath>
<✔NWS> Our top weather story this AM comes out of Washington DC where a Flash Flood Emergency was issued earlier. Reagan N… https://t.co/lH9Cjqjtfr
<B787_300>
also IXPE sounds like an interesting mission
<B787_300>
never thought about Polarimetry wrt Xrays
<SnoopJeDi>
They closed down the inner loop of the capitol beltway. Insane.
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