UmbralRaptor changed the topic of #kspacademia to: https://gist.github.com/pdn4kd/164b9b85435d87afbec0c3a7e69d3e6d | Dogs are cats. Spiders are cat interferometers. | Космизм сегодня! | Document well, for tomorrow you may get mauled by a ネコバス. | <UmbralRaptor> egg|nomz|egg: generally if your eyes are dewing over, that's not the weather. | <ferram4> I shall beat my problems to death with an engineer. | We can haz pdf
<mofh>
It's surprisingly detailed honestly, and useful. Like, Recurrence Properties looks mostly direct from Capderou but translated, so I don't think there even could be issues there, otherwise maybe a bit of info on how the mean elements are derived might be of value but I'm not sure that doc is the place for it? Otherwise, yeah.
<egg>
mofh: how they are derived is definitely not something with which the user should concern themselves
<egg>
e.g. if I decided to switch to Brouwer's theory and compute analytic mean elements, they would still be mean elements for the same purposes
<egg>
what they are for is a good question
<egg>
honestly I'm not quite sure
<egg>
maybe I should develop the typology of frozen orbits etc. a bit
<SilverFox>
anyone here able to give some guidance on how I could implement ethernet capabilities in my DIY computer project?
<whitequark>
microchip makes an Ethernet-to-SPI converter chip
<whitequark>
ENC28J60
<SilverFox>
what is SPI?
<whitequark>
google it
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<SilverFox>
whitequark, do you know how to go about memory mapping without requiring double or more the memory?
<whitequark>
what
<whitequark>
i don't understand why you'd need double the memory
<SilverFox>
variable x is stored in ram somewhere, that location needs to be saved, and that requires at least 1 memory address, thus 2 memory addresses are needed, no?
<whitequark>
i feel like you need to read some introductory material on computer architecture before building your own
<SilverFox>
prolly
<whitequark>
i think "nand2tetris" could be a useful resource
<SilverFox>
I'm still in the design phase so it's k
<whitequark>
didn't go through it personally for various reasons, but it seems fine to me and i've heard a bunch good things
<whitequark>
i would also recommend some understanding of compiler design
<whitequark>
since a lot of contemporary architectures are designed hand-in-hand with compiler people
<whitequark>
but that's probably optional, if very informative
<SilverFox>
I was hoping that implementing ethernet was going to be easier, but it is what it is I guess
<SilverFox>
im hoping that my system not running at 20Mhz speeds or faster wont be an issue
<whitequark>
that's the easy way to implement ethernet
<whitequark>
doing it with a discrete PHY/MAC is much harder
<whitequark>
also
<whitequark>
enc28j60 runs as slow as you want, since you provide the clock
<whitequark>
you could probably use it with like buttons and LEDs
<whitequark>
(appropriately debounced buttons)
<SilverFox>
right which is another thing, I dont want to be too slow where connections drop
<SilverFox>
yes, I've learned about debouncing with 555 or other components, very crazy to get down to the nitty gritty elasticity property of materials
<whitequark>
i think if you've never done this before, ethernet is extremely ambitious, bordering on unrealistic
<whitequark>
i would suggest making sure the CPU itself works properly first using something much simpler
<whitequark>
like an UART or even a bunch of LEDs
<SilverFox>
of course, it's an addon module
<SilverFox>
which will be added via the Addon Bus
<SilverFox>
kinda like PCie, but only in concept
<whitequark>
sure
<SilverFox>
1MB at this level is a lot of storage isn't it?
<SilverFox>
sorry, RAM
<whitequark>
hmmm
<whitequark>
surprisingly not that much
<SilverFox>
that's one of my big worries
<whitequark>
hang on
<whitequark>
do you want to make the entire machine out of single gates or just the CPU?
<SilverFox>
I'm using gatechips, and I want to stay as DIY as possible
<SilverFox>
unless there's specific function, like that ethernet chip
<whitequark>
well you could definitely make ethernet out of 74xx series logic
<whitequark>
it just requires a lot of skill
<SilverFox>
or the SRAM/DRAM
<whitequark>
woz made the floppy controller out of hard logic like that
<SilverFox>
it'd be cool if I could use DDR4 sticks, but I dont expect that at all
<whitequark>
10base-t ethernet is about as hard
<whitequark>
ddr4 hahahahahahahhahaa
<whitequark>
no. forget it. even experienced designers using latest technology have serious trouble with ddr4
<whitequark>
in fact i'm sometimes surprised it works at all
<SilverFox>
as I said, I dont expect it at all
<whitequark>
forget about ddr memory in general, actually
<kmath>
<whitequark> <@eggleroy> *points at 555 timer* octode
<whitequark>
by this point there are no memory sticks left with memory you can use
<whitequark>
as in
<SilverFox>
as long as I can be like "I want data from X location, gib pls"
<whitequark>
they're sufficiently collector items that you will be hard pressed to find one.
<whitequark>
however.
<whitequark>
you can buy SRAM chips easily and they're cheap and high density
<whitequark>
and they have a very simple interface
<SilverFox>
yeah I was looking at SRAM stuff on mouser
<whitequark>
yep. use that.
<whitequark>
you could also make DIY memory.
<whitequark>
2 inverters per bit
<SilverFox>
not dense enough
<whitequark>
which is how SRAM works
<whitequark>
sure.
<SilverFox>
im not at the die-hard level of making the stuff from transistors
* egg
read DIY as "weave ferrite core"
<SilverFox>
yeah no thanks my dude
<SilverFox>
Do you think it'd be out of reach to implement the same sort of addon bus, but a ram device bus, 4 bit bus should be just fine and have it aside to the standard memory bus
<SilverFox>
this way I could add or remove modules as needed
<whitequark>
lots of early computers had a single bus with RAM and peripherals on it
<whitequark>
that's a perfectly reasonable design
<whitequark>
you could also split them, sure
<SilverFox>
I'd rather separate busses, but I understand the convenience in design of single-bus
<whitequark>
it's a matter of your own convenience and basically nothing else
<SilverFox>
this project isn't require to be expediant
<SilverFox>
I'd rather design it well and never build it than just build it and waste money on poor design
<whitequark>
i believe you can't design things like this non-iteratively
<SilverFox>
I'm gonna try my best
<whitequark>
people have pulled this off before (in the history of computing), but they were more or less geniuses and/or had a lot of prior experience
<whitequark>
i've spent a few years doing things like this and i would certainly not expect anything i build be the final design. maybe you're much better at it :p
<SilverFox>
I'm really into designing it modularly so that I could have more potential to iteratively design it without significant change
<SilverFox>
whitequark, I'm very much not better at it, but I will damn well try
<SilverFox>
the design and problem-solving that way is just as much fun for me, if not more, than actually building it
<whitequark>
absolutely no argument
<whitequark>
lots of people find designing fantasy CPU architectures fun
<whitequark>
i happened to also implement a few of mine, they even run, although not as fast as i wish they did
<SilverFox>
oh yeah, the cpu architecture, debating between going RISC or ARM for inspiration
<whitequark>
ARM is RISC though?
<SilverFox>
oh yeah lol
<SilverFox>
am rarted
<SilverFox>
are there any other good architectures that are small-design?
<SilverFox>
I think the x86 and x86-64 stuff is super bloated, from what I hear
<SilverFox>
also, whitequark how hard do you think it'd be to implement hardware floating point arithmetic?
<SilverFox>
also also, I have the idea of Instruction-Based Variable Clockrate, as different instructions can be executed at different rates reliably, so perhaps adjusting the clock based on the current instruction could save some time and make things more efficient
<whitequark>
SilverFox: there's a bunch of architectures made to minimize transistor count
<whitequark>
an IRC client has very modest requirements
<SilverFox>
so what exactly is a tristatable bus? I assume 3 states, but what are the 3 states?
<whitequark>
logic 1, logic 0, and high impedance aka hi-z
<SilverFox>
why high impedence mode?
<SilverFox>
what does that accomplish?
<whitequark>
if you have a normal output buffer, it, well, buffers the input signal: if there's 0 on input, there's 0 on the output, and the same for 1
<whitequark>
this is the so-called low impedance path: if you e.g. poke it with a meter, it will have a few ohms resistance to ground
<whitequark>
(and impedance is generalized resistance)
<SilverFox>
right
<whitequark>
if you have an output buffer with an output enable input, if you set that output enable input to logic low, the output buffer does not drive the bus to any state. if that's the only thing on the bus, and you poke it with a meter, it'll be a few megohms or something
<whitequark>
so, high impedance
<whitequark>
an output buffer with an output enable input *and* an input buffer in one package would be a bidirectional buffer.
<whitequark>
which also lets you snoop what
<whitequark>
's happening on the bus when you're not driving it
<SilverFox>
so the high impedance path is just for snooping whats in the buffer?
<SilverFox>
without altering the actual main travel of the flow?
<whitequark>
not in the buffer
<whitequark>
remember, in EE a "buffer" doesn't have any state, so there can't be anything in it
<whitequark>
a buffer, in the simplest case, is just a pair of transistors in the "totem pole" configuration
<whitequark>
upper one is open -> high, lower one is open -> low, neither is open -> hiz
<whitequark>
both are open -> your circuit makes smoke
<SilverFox>
lmao
<SilverFox>
the magical fourth option nobody wants
<whitequark>
an output buffer drives a bus external to your device, an input buffer looks at the bus and drives something inside of your device
<whitequark>
buffers are used to reduce loading on your bus. e.g. if you have 10 devices connected to it, and you didn't have any input buffers, any device that drives the bus would have to drive every transistor in every device connected to the bus that's connected to each pin of the bus
<whitequark>
if you have 10 devices and each buffers the bus before doing anything with it, you only drive the transistors in those input buffers
<SilverFox>
right because each would be logic 0 and sinking current
<whitequark>
well, no
<whitequark>
the kind of loading depends on your process
<whitequark>
if you use CMOS, you only spend energy changing the bus' state
<whitequark>
if you use NMOS, then driving 0 requires spending energy and 1 is the normal state of a bus
<SilverFox>
I dont like having the stuff inverted
<whitequark>
TTL is similar to NMOS somewhat
<SilverFox>
so each module will have a buffer-thing that they use to read-write the bus, right?
<SilverFox>
that's the best way to do that?
<whitequark>
yep
<whitequark>
if you use a shared bus, yes
<SilverFox>
would Floating point be hard to design in hardware?
<whitequark>
very
<SilverFox>
oof
* egg
is awoken by the floating point talk
* egg
grumbles
<SilverFox>
egg, thinking about designing FP capabilities for breadboard computer
<egg>
menacing guard bits surround SilverFox
<SilverFox>
what about FP makes it so hard to implement in hardware?
<whitequark>
it's complex and wide
<whitequark>
have you made an integer ALU yet?
<SilverFox>
integer will come first, yes
<SilverFox>
it will do add, subtract, multiply, and divide
<egg>
[insert pun about "wide" and simd here]
<SilverFox>
extra thicc
* egg
pushes SilverFox into a mass of sticky bits
<SilverFox>
gross
* egg
signals the invalid operation exception
* SilverFox
invokes negative zero
<egg>
what about it
<SilverFox>
good stuff
<SilverFox>
love it
<SilverFox>
the best
<SilverFox>
whitequark, what about half-precision?
<whitequark>
SilverFox: why
<whitequark>
it's a storage only format
<whitequark>
doesn't have enough precision for almost anything except ML
<SilverFox>
hmm, that sucks
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<SilverFox>
yanno what else sucks? that Nightly randomly decides that you can no longer make meaningful input and you have to close your session and start over
<SilverFox>
and its very difficult to transfer almost 900 tabs between Nightly and Firefox
<SilverFox>
heyo whitequark, a what-if here for ya, what if you just didnt have an integer alu and only used an FPU
<whitequark>
javascript cpu
<whitequark>
you reuse the alu to generate addresses, generally
<whitequark>
why do you even need an fpu
<SilverFox>
every calculator worth its salt can do floating point operations
<whitequark>
they dont have an fpu
<whitequark>
just like you dont need 3d acceleration to run doom
<SilverFox>
software rendering is reeee
<whitequark>
shrug, an fpu doesn't even let you make a good calculator
<whitequark>
you usually want bignums and/or software implementations of sin()cos() etc
<SilverFox>
for some reason loading up all my tabs is a very gpu-intensive process
<SilverFox>
whitequark, would my computer be considered having a real-time OS, rather than whatever the fuck modern systems run?
<whitequark>
"real-time" simply means that you can respond to an event within a hard time bound
<SilverFox>
I see
<whitequark>
you can do it in linux, in certain restricted circumstances
<whitequark>
(linuxcnc makes use of it)
<SilverFox>
I wonder how much of step it is to go from running single-program to having an OS
<SilverFox>
obviously not like, windows XP level or anything, but like, DOS at best?
<whitequark>
not much at all
<SilverFox>
cool
<SilverFox>
how do calculators do decimal points with only integer stuffs?
<whitequark>
egg would be better positioned to explain this
<SnoopJeDi>
whitequark, I can barely grok that C but it seems extremely haunted
<whitequark>
it is
<SilverFox>
do they just do decimal shifting shenanigans?
<SilverFox>
I have finally, through a 4-step process, migrated my now 700-tab session from Nightly to Firefox to hopefully mitigate a weird gpu issue
<SilverFox>
whitequark, how hard would it be to setup PS/2 support, and of course implement the very important feature of crashing the entire machine when a device is unexpectedly plugged or unplugged
<whitequark>
not that hard... provided the rest of the machine works well
<SilverFox>
whats the benefit here of doing the interrupt thing for the keyboard/mouse?
<whitequark>
the interrupt thing?
<SilverFox>
yeah hardware interrupts
<whitequark>
well, you don't have to spend time polling the mouse
<whitequark>
the latency is lower too
<whitequark>
my CPU doesn't have interrupts at all though
<SilverFox>
when you type the keyboard it halts the cpu and does the keyboard thing, then resumes, right? that's how hardware keyboard interrupt works?
<whitequark>
more or less
<SilverFox>
that whole halting thing might be a challenge
<SilverFox>
but I think a good way of going about it is a dedotated wam section for the system and peripherals
<whitequark>
interrupts are hard
<SilverFox>
for the low low price of 465$ I can 288Mbit of sram lmao
<SilverFox>
36MB
<SilverFox>
16$ gets you 2MB though
<SilverFox>
!c 1
<galois>
SilverFox: 1
<SilverFox>
!c 3.3*0.06
<galois>
SilverFox: 0.198
<SilverFox>
200mW not bad
<SilverFox>
I hate ball-grid parts but if I go that route they get to 4.50$ for a 4MB chip
<SilverFox>
75mW of power consumption as well, much better
<SilverFox>
!wa 70ns to Hz
<SilverFox>
whitequark, anything with three state outputs is that tristate stuff we talked about earlier right?
<_whitenotifier-cd19>
[Principia] Kerbinator-CN opened issue #2347: Burn in time warp with RO ion engines (new feature suggestions) - https://git.io/Jece2
<_whitenotifier-cd19>
[Principia] sswelm commented on issue #2347: Burn in time warp with RO ion engines (new feature suggestions) - https://git.io/JecIw
<_whitenotifier-cd19>
[Principia] sswelm edited a comment on issue #2347: Burn in time warp with RO ion engines (new feature suggestions) - https://git.io/JecIw
<_whitenotifier-cd19>
[Principia] sswelm edited a comment on issue #2347: Burn in time warp with RO ion engines (new feature suggestions) - https://git.io/JecIw
<kmath>
<TheMasterAsh> I just got the blu-ray of The Mummy (the original one) and despite the fact that basically EVERYTHING in it is hist… https://t.co/v3gzMGM4AX
<mofh>
egg|work|egg: will check those out (and the tool) when I get back from Le Louvre; just renewed my subscription for another year
<mofh>
egg|work|egg: also the roof design of the Cour Visconti is neat
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<_whitenotifier-cd19>
[Principia] pleroy opened pull request #2349: Change the code to conform to the documentation in Celledoni.pdf - https://git.io/JectS
<_whitenotifier-cd19>
[Principia] eggrobin labeled pull request #2349: Change the code to conform to the documentation in Celledoni.pdf - https://git.io/JectS
<_whitenotifier-cd19>
[Principia] pleroy synchronize pull request #2349: Change the code to conform to the documentation in Celledoni.pdf - https://git.io/JectS
<_whitenotifier-cd19>
[Principia] pleroy closed pull request #2349: Change the code to conform to the documentation in Celledoni.pdf - https://git.io/JectS
<_whitenotifier-cd19>
[Principia] pleroy pushed 3 commits to master [+0/-0/±3] https://git.io/JecY3
<_whitenotifier-cd19>
[Principia] pleroy f7cb12e - Change the code to conform to the documentation.
<_whitenotifier-cd19>
[Principia] pleroy e68f3a4 - After egg's review.
<_whitenotifier-cd19>
[Principia] pleroy a425a94 - Merge pull request #2349 from pleroy/Conformity2 Change the code to conform to the documentation in Celledoni.pdf
<egg>
!acr -add:SPIRALE Système Préparatoire Infra-Rouge pour l’ALErte
<galois>
[WIKIPEDIA] BKL singularity | "A Belinskii–Khalatnikov–Lifshitz (BKL) singularity is a model of the dynamic evolution of the Universe near the initial singularity, described by an anisotropic, chaotic solutions of the Einstein field equations of gravitation. According to this model, the Universe is chaotically oscillating around a..."
<whitequark>
lol
<SilverFox>
well you have to store in multiple of 8-bit, so you'd have 6 bits extra with the 10-bit scheme, you could recycle those for the next set, but then you get into shifting shenanigans
<whitequark>
no you don't
<whitequark>
you can pack three of these thousand groups into a 32-bit number. you get 2 free bits at the top
<SilverFox>
ah, store them in 32-bit chunks I see
<whitequark>
you can use one of these bits at the top for "the next 32-bit number is a continuation of this"
<whitequark>
which you will very often want for arbitrary precision numerics
<whitequark>
and the other bits, well, implementations usually find a reason to use it
<whitequark>
maybe a flag of some sort
<whitequark>
the other bit*
<SilverFox>
I see
<egg>
whitequark: oh, it has x^y rather than y^x
<egg>
the HP-35 had x^y too iirc
<egg>
they then changed it, because it's kinda weird to use
<whitequark>
^ meaning power?
<egg>
yeah
<egg>
HP-67 has y^x
<egg>
so 2 5 ^ gives you 2^5, rather than 5^2
<whitequark>
it also uses RPN
<whitequark>
i'm not sure if it has SWAP
<whitequark>
it's been a long time since i used it
<egg>
I think the unshifted key for x^y might be a swap?
<egg>
it has a two way arrow
<egg>
which feels swappy
<whitequark>
i have a manual for it now, actually
<whitequark>
and full schematic!!
<egg>
oh nice
<whitequark>
hey do you wanna vectorize the МК-61 chipset
<whitequark>
if yes i could buy another one and provide you with high res die shots
<egg>
what do you mean by vectorize
<whitequark>
like, trace the actual chips it's made of
<whitequark>
so it can be simulated in SPICE or something
<whitequark>
with every single original bug
<egg>
this sounds fun, but it also sounds far outside the realm of things wherein I am competent
<whitequark>
you can draw rectangles in inkscape right.
<whitequark>
lots of rectangles.
<egg>
maybe, if I can figure out whether I have a working inkscape install
<whitequark>
there are dedicated silicon RE tools too, which might be useful for this
<whitequark>
oh excellent, a dead MK-61 for 50 RUB
<whitequark>
less than $1
<egg>
whitequark: fun fact: I learned about formal grammars by writing an HP-67 simulator with my father
<egg>
whitequark: that calculator has the stack (last X) XYZT, and primary memory registers 0 .. 9, secondary memory registers 0 .. 9, and the registers ABCDE I
<egg>
the secondary registers can only be accessed by swapping primary and secondary
<egg>
I can be used for indirect addressing into 0 .. 9